For example, the high-voltage MIS transistor, not only preferable high-frequency characteristics but also high withstanding voltages of a source and a drain are expected.
In the high withstanding voltage MIS transistor, a high voltage is applied to a drain region. Then, a high electric field is generated at the border between the drain region and a channel region, thereby creating junction breakdown (breakdown phenomenon) at the border portion. Therefore, it is a problem for the high withstanding voltage how electric field generated between the border between the drain region and the channel portion is relieved.
In order to relieve the electric field, upon forming the high-voltage MIS transistor, Japanese Laid-open Patent Publication No. 08-64689 discusses the structure of such a high withstanding voltage MIS transistor formed in a drain region remotely from a gate electrode with a high impurity concentration. Herein, “the drain region is formed remotely from the gate electrode” means that the drain region is formed at a distance from the gate electrode.
With the high-voltage MIS structure discussed in Japanese Laid-open Patent Publication No. 08-64689, the realization of a high withstanding voltage needs the increase in remote distance between the gate electrode and an area with a high impurity concentration in the drain region. However, the remote distance increases and on-resistance of the transistor then rises. Thus, the reduction in drive capacity of the transistor may be caused. The on-resistance rises because the area with a low impurity concentration increases between the gate electrode and the area with a high impurity concentration and the parasitic resistance then rises.